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LT3781 "Bootstrap" Start Dual Transistor Synchronous Forward Controller
FEATURES
s s
DESCRIPTIO
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s s s s s
s s
High Voltage Operation up to 72V Synchronizable Operating Frequency and Output Switch Phase for Multiple Controller Systems Synchronous Switch Output Undervoltage Lockout Protection with 6V Hysteresis for Self-Biased Power Fixed Frequency Operation to 350kHz Local 1% Voltage Reference Input Overvoltage Protection Low Start-Up Current Programmable Start Inhibit for Power Supply Sequencing and Protection Optocoupler Support Soft-Start Control Isolated Telecommunication Systems Personal Computers and Peripherals Distributed Power Step-Down Converters Lead Acid Battery Backup Systems Automotive and Heavy Equipment
The LT(R)3781 controller simplifies the design of high power synchronous dual transistor forward DC/DC converters. The part employs fixed frequency current mode control and supports both isolated and nonisolated topologies. The IC drives external N-channel power MOSFETs and operates with input voltages up to 72V. The LT3781 is ideal for output derived power schemes, through the use of a large undervoltage lockout hysteresis range. The part is also equipped with an 18V VCC shunt regulator, which prevents exceeding absolute maximum ratings while in trickle start applications. The LT3781's operating frequency is programmable and can be synchronized up to 350kHz. Switch phase is also controlled during synchronized operation to accommodate multiple-converter systems. Internal logic guarantees 50% maximum duty cycle operation to prevent transformer saturation. The LT3781 is available in a 20-lead SSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
s s s s s
TYPICAL APPLICATIO
VIN+ L1 4.7H
36V-72V to 5V/7A DC/DC Synchronous Forward Converter (Quarter-Brick Footprint)
T1 6 Q1 MURS120T3 7 5 MURS120T3 R9 0.025 1/2W 8 4 9 Q5 ZVN3310F
*
+
C2 22F 100V C3 1.5F 100V
C4 1.5F 100V
* *
1 2 3
Q3
10 11 12
1nF 100V 1nF 100V 10 0.25W
*
VIN-
BAT54
1OV BIAS MMBD914LT1 270k 0.25W 73.2k 1% 20k 13 2 1 0.1F 68F 20V 1nF 1.24k 1% 10k 1F BAS21 20 VCC VBST OVLO SHDN 5VREF FSET 19 18 LT3781 15 11 14 TG BSTREF BG SENSE 0.1F 100V
10k 330pF 5V OUT 3.3k 0.047F LTC1693-2 6 VCC1 VCC2 5 IN2 OUT2 7 1 IN1 OUT1 2 4 GND2 GND1 8 3 51 6.8k 1k 1% 1OV BIAS FZT690 4.7F 16V
PGND 12 SG 9
THERM SYNC SGND SS VC VFB 3 7 4 8 10
6 5 52.3k 150pF
+
100 4.7nF 0.01F
3.01k 1%
C2:SANYO 100MV22AX C3, C4: VITRAMON VJ1825Y155MXB C5: 4X KEMET T510X337KO10AS L1: COILCRAFT DO1608C-472
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L2 4.7H 10 0.25W VOUT = 5V IOUT = 7A VOUT+ MBR0540T1 Q6
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+
C5 330F 10V
4.7 VOUT-
100 CMPZ5242B 12V
2k 0.22F 50V
L2: PANASONIC ETQP6F4R1LF4 Q1,Q3:100V SILICONIX SUD40N10-25 Q5,Q6: SILICONIX Si4450 T1:COILTRONICS VP5-1200
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LT3781
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW SHDN OVLO THERM SGND 5VREF FSET SYNC SS VFB 1 2 3 4 5 6 7 8 9 20 VBST 19 TG 18 BSTREF 17 NC 16 NC 15 BG 14 PWRGND 13 VCC 12 SG 11 SENSE
Power Supply (VCC) Low Impedance Source Voltage ............. -0.3V to 20V Shutdown Mode: (Supply Self-Regulates to 18V) Maximum Input Current ............................... 20mA Topside Supply (VBST) .................................................... VBSTREF - 0.3V to VBSTREF +20V (VBST(MAX) = 90V) Topside Reference Pin (VBSTREF) ............... -0.6V to 75V SHDN Pin Voltage ........................... -0.3V to VCC + 0.3V All Other Input Voltages .............. -0.3V to 5VREF + 0.3V 5VREF Pin Sink Current ......................................... 10mA FSET Pin Current ...................................... -2mA to 5mA All Other Input Pin Currents ...................... -2mA to 2mA Operating Ambient Temperature Range (Note 4) ...............-40C to 85C Operating Junction Temperature Range ...............................-40C to 125C Storage Temperature Range ..................-65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LT3781EG LT3781IG
VC 10
G PACKAGE 20-LEAD PLASTIC SSOP
TJMAX = 125C, JA = 90C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VCC = VBST = 12V, VBSTREF = 0V, VVC = 2V, VFB = VREF = 1.25V, CTG = CBG = CSG = 1000pF.
SYMBOL PARAMETER Supply and Protection VCCUVLO Undervoltage Lockout Threshold VCCSHDN ICC Shutdown Mode Shunt Regulator DC Active Supply Current CONDITIONS Falling Edge Rising Edge 100A < IVCC 10mA (Note 2) VSHDN = 1.35V, VCC = 8V VSHDN < 0.3V TG Logic High (Note 2) VSHDN < 0.3V
q q q q
MIN 8.0 13 16.5
TYP 8.4 14.5 18 17 800 16 5.0 0.1 1.25 150 - 10 225 6.4 7.0 0.6 5.0 45 1
MAX 8.6 16 19.9 22 25 1200 30 8.5 1.35 200 -6 7.1 7.5
UNITS V V V mA mA A A mA A V mV A mV V V V V V mA
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DC Active UVLO Supply Current DC Standby Supply Current VBST DC Active Supply Current DC Standby Supply Current VSHDN Shutdown Rising Threshold Shutdown Threshold Hysteresis ISS Soft-Start Charge Current VSS Soft-Start Reset Threshold VBSTUVLO Boost Undervoltage Lockout (VBST-BSTREF) Boost UVLO Hysteresis 5V External Reference V5VREF 5V Reference Voltage I5VREFSC R5VREF Short-Circuit Current Output Impedance
q q q q
VSS = 2V Falling Edge Rising Edge
q q q q
1.15 100 -14 5.7 6.5 0.3 4.85 4.80 20
0 (I5VREF - IVC) < 20mA
q
5.10 5.15
Source, IVC = 0 0 (I5VREF - IVC) < 20mA
q
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LT3781
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25C. VCC = VBST = 12V, VBSTREF = 0V, VVC = 2V, VTS = 0V, VFB = VREF = 1.25V, CTG = CBG = CSG = 1000pF.
SYMBOL Error Amp VFB IFB AV IVC VVC GBW AV ISENSE VSENSE tD tMIN VTHERM/ VOVLO tD fOSC IFSET VSYNC fSYNC tH, L Error Amplifier Reference Voltage Feedback Input Current Error Amplifier Voltage Gain Error Amplifier Current Limit Zero Current Output Voltage Maximum Output Voltage Gain Bandwidth Product Amplifier DC Gain Input Bias Current Current Limit Threshold Current Sense to Switch Delay Switch Minimum On Time Threshold (Rising Edge) Threshold Hysteresis Fault Delay to Output Disable Oscillator Frequency, Free Run Frequency Programming Error FSET Input Bias Current SYNC Logic High Input Threshold SYNC Logic Low Input Threshold SYNC Frequency Maximum SYNC Pulse Width (Logic High or Logic Low) TG On Voltage TG Off Voltage TG Rise/Fall Time BG On Voltage BG Off Voltage BG Rise/Fall Time SG On Voltage SG Off Voltage SG Rise/Fall Time SG to BG Enable Lag Time TG to BG Enable Lag Time 10% to 90%/90% to 10% 4V On/Off Thresholds 4V On/Off Thresholds
q
PARAMETER
CONDITIONS Measured at Feedback Pin
q
MIN 1.242 1.225
TYP 1.250 -50 72
MAX 1.258 1.265
UNITS V V nA dB mA mA V V MHz V/V A
VFB = VREF Source Sink
q q
10 0.5
25 1 1.4 3.2
(Note 3)
1 12 - 275
Current Sense
Measured at SENSE Pin
q
135 130
150 175
165 170
mV mV ns ns
Measured at BG Output
q q
250 1.2 20 1.25 40 650 700
q
THERM and OVLO Fault Detectors 1.3 60 V mV ns kHz % nA 2 350 1/fOSC V V kHz s
>50mV Overdrive Measured at FSET Pin fOSC 500kHz (Note 3) FSET Charging, VFSET = 2V Positive-Going Edge Negative-Going Edge fOSC = Oscillator Free-Run Frequency
q q q
Oscillator and Synchronization Decoder -10 50 0.8 fOSC/2 1.4 1.4 5
Output Drivers VTG tTGr/f VBG tBGr/f VSG tSGr/f tSG-BG tTG-BG
q q
11
11.5 0.1 35 11.5 0.1 35 11.5 0.1 35 150 100
0.5 12 0.5 12 0.5 300
V V ns V V ns V V ns ns ns
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10% to 90%/90% to 10%
q q
11
10% to 90%/90% to 10%
q q
11
80
3
LT3781
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Supply current specification does not include external FET gate charge currents. Actual supply currents will be higher and vary with operating frequency, operating voltages, and the type of external switch elements used. See Applications Information. Note 3: Guaranteed but not tested. Note 4: The LT3781E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the -40C to 85C operating ambient temperature range are assured by design, characterization and correlation with statistical process controls. For guaranteed performance to specifications over the -40C to 85C operating ambient temperature range, the LT3781I is available.
TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Mode: VCC vs ICC
18.4 TA = 25C
18.20
18.2
VCC (V)
18.0
17.8
17.6 100
300
1m ICC (A)
VCC (V)
ICC Supply Current vs Temperature
20 VCC = 12V
ICC SUPPLY CURRENT (mA)
ICC SUPPLY CURRENT (mA)
19
18
17
16
15 -55 -40
40 80 TEMPERATURE (C)
4
UW
0
Shutdown Mode: VCC vs Temperature (ICC = 1mA)
18.15
18.10
18.05
3m
10m
3781 * G01a
18.00 -55 -40
40 80 0 TEMPERATURE (C)
125
3781 * G01b
ICC Supply Current vs VCC Supply Voltage
18 TA = 25C
17
16
125
3781 G01
15
9
10
12 14 16 SUPPLY VOLTAGE (V)
18
3781 G03
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LT3781 TYPICAL PERFOR A CE CHARACTERISTICS
IBST Boost Supply Current vs Temperature
5.2
IBST BOOST SUPPLY CURRENT (mA)
5.1
40
UVLO ICC SUPPLY CURRENT (mA)
ICC SUPPLY CURRENT (A)
5.0
4.9
4.8 -55 -40
40 80 TEMPERATURE (C)
0
5VREF Voltage vs Temperature
5VREF SHORT-CIRCUIT CURRENT LIMIT (mA)
5.10 60
5.05
ERROR AMP REFERENCE (V)
5VREF VOLTAGE (V)
5.00
4.95
4.90 -55 -40
40 80 TEMPERATURE (C)
0
VC Pin Short-Circuit Current Limit vs Temperature
VC PIN SHORT-CIRCUIT CURRENT LIMIT (mA)
25 12
SOFT-START OUTPUT CURRENT (A)
11
20
SOFT-START OUTPUT CURRENT (A)
15
10 -55 -40
40 80 TEMPERATURE (C)
0
UW
3781 G04 3781 G07 3781 G10
ICC Supply Current vs SHDN Pin Voltage
60 TA = 25C 1
UVLO ICC Supply Current vs Temperature
0.8
20
0.6
125
0 0 0.2 0.4 0.6 0.8 1.0 SHDN PIN VOLTAGE (V) 1.2
3781 G05
0.5 -55 -40
0 40 80 TEMPERATURE (C)
125
3781 G06
5VREF Short-Circuit Current Limit vs Temperature
1.260
Error Amp Reference vs Temperature
1.255
50
1.250
40
1.245
125
30 -55 -40
40 80 TEMPERATURE (C)
0
125
3781 G08
1.240 -55 -40
0 40 80 TEMPERATURE (C)
125
3781 G09
Soft-Start Output Current vs Temperature
60
Soft-Start Output Current vs Soft-Start Pin Voltage
TA = 25C
VSS = 2V
40
10
20
9
125
8 -55 -40
0
40 80 TEMPERATURE (C)
0
125
3781 G11
0
100 200 300 400 SOFT-START PIN VOLTAGE (mV)
500
3781 G12
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LT3781 TYPICAL PERFOR A CE CHARACTERISTICS
Soft-Start Output Current vs Soft-Start Pin Voltage
60
CURRENT SENSE AMP BANDWIDTH (MHz)
5
SOFT-START OUTPUT CURRENT (A)
40
20
0 0 1 2 3 4 SOFT-START PIN VOLTAGE (V)
PI FU CTIO S
SHDN (Pin 1): Shutdown Pin. Pin voltages exceeding positive going threshold of 1.25V enables the LT3781. 150mV of input hysteresis resists mode switching instability. The SHDN pin can be controlled by either a logic level input or with an analog signal. This shutdown feature is typically used for input supply undervoltage protection. A resistor divider from the converter input supply to the SHDN pin monitors that supply for control of system power-up sequencing, etc. An 18V clamp on the VCC pin is enabled during shutdown mode, preventing a trickle start circuit from pulling that pin above maximum operational levels. All other internal functions are disabled during shutdown. OVLO (Pin 2): Overvoltage Shutdown Sense. Typically connected to input supply through a resistor divider. If pin voltage exceeds 1.25V, LT3781 switching function is disabled to protect boosted circuitry from exceeding absolute maximum voltage. 40mV of input hysteresis resists mode switching instability. Exceeding the OVLO threshold also triggers soft-start reset, resulting in a graceful recovery from an input transient event. THERM (Pin 3): System Thermal Shutdown. Auxiliary shutdown pin that is typically used for system thermal protection. If pin voltage exceeds 1.25V, LT3781 switching function is disabled. 40mV of input hysteresis resists mode switching instability. Exceeding the THERM threshold also triggers soft-start reset, resulting in a graceful recovery. SGND (Pin 4): Signal Ground Reference. Careful board layout techniques must be used to prevent corruption of signal ground reference. High-current switching paths must be oriented on the converter ground plane such that currents to/from the switches do not affect the integrity of the LT3781 signal ground reference. 5VREF (Pin 5): 5V Local Reference. Allows connection of external loads up to 20mA DC. Typically bypassed with 1F ceramic capacitor to SGND. Reference output is current limit protected to a typical value of 45mA. If the load on the 5V reference exceeds the current limit value, LT3781 switching function is disabled and the soft-start function is reset. FSET (Pin 6): Oscillator Timing Pin. Connect a resistor (RFSET) from the 5VREF pin to this pin and a capacitor (CFSET) from this pin to ground.
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Current Sense Amplifier Bandwidth vs Temperature
TA = 25C
8 7 6 5 4 3 2 -55 -35 -15
5 25 45 65 85 105 125 TEMPERATURE (C)
3781 G14
3781 G13
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LT3781
PI FU CTIO S
The LT3781 oscillator operates by monitoring the voltage on CFSET as it is charged via RFSET. When the voltage on the FSET pin reaches 2.5V, the oscillator rapidly discharges the capacitor with an average current of about 0.8mA. Once the voltage on the pin is reduced to 1.5V, the pin becomes high-impedance and the charging cycle repeats. The oscillator operates at twice the switching frequency of the controller. Oscillator frequency fOSC can be approximated by the relation:
-1 R 2 0.5 * 10-6 + C FSET FSET + 8 * 10- 4 + RFSET 3 -1
fOSC
SYNC (Pin 7): Oscillator Synchronization Input Pin with TTL-Level Compatible Input. The SYNC input signal (at the desired synchronized operating frequency) controls both the internal oscillator (running at twice the SYNC frequency) and the output switch phase. If synchronization function is not desired, this pin may be floated or shorted to ground. The LT3781 internal oscillator drives a toggle flip-flop that assures a 50% duty-cycle condition during oscillator free-run. The oscillator, therefore, runs at twice the operating frequency of the controller. The SYNC input decoder incorporates a frequency doubling circuit for oscillator synchronization, resetting the internal oscillator on both the rising and falling edges of the input signal. The SYNC input decoder also differentiates transition phase and forces the toggle flip-flop to phase-lock with the SYNC input. A transition to logic high on the SYNC input signal corresponds to the initiation of a new switching cycle (primary switches turning on pending current control) and a transition to logic low forces a primary switch off state. As such, the maximum operating duty cycle is equal to the duty cycle of the SYNC signal. The SYNC input can therefore be used to reduce the maximum duty cycle of the controller by reducing the duty cycle of the SYNC input.
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SS (Pin 8): Soft-Start. Connect a capacitor (CSS) from this pin to ground. The output voltage of the LT3781 error amplifier corresponds to the peak current sense amplifier output detected before resetting the switch outputs. The soft-start circuit forces the error amplifier output to a zero sense current for start-up. A 10A current is forced from this pin onto an external capacitor. As the SS pin voltage ramps up, so does the LT3781 internally sensed current limit. This effectively forces the internal current limit to ramp from zero, allowing overall converter current to slowly increase until normal output regulation is achieved. This function reduces output overshoot on converter start-up. The softstart functions incorporate a 1VBE "dead zone" such that a zero-current condition is maintained on the VC pin until the SS pin rises to 1VBE above ground. The SS pin voltage is reset to start-up condition during shutdown, undervoltage lockout, and overvoltage or overcurrent events, yielding a graceful converter output recovery from these events. VFB (Pin 9): Error Amplifier Inverting Input. Typically connected to a resistor divider from the output and compensation components to the VC pin. The VFB pin is the converter output voltage feedback node. Input bias current of ~50nA forces pin high in the event of an open feedback path condition. The error amplifier is internally referenced to 1.25V. Values for the VOUT to VFB feedback resistor (RFB1) and the VFB to ground resistor (RFB2) can be calculated to program converter output voltage (VOUT) via the following relation: VOUT = 1.25 * (RFB1 + RFB2)/RFB2 VC (Pin 10): Error Amplifier Output. The LT3781 error amplifier is a low impedance output inverting gain stage. The amplifier has ample current source capability to allow easy integration of isolation optocouplers that require bias currents up to 10mA. External DC loading of the VC pin reduces the external current sourcing capacity of the 5VREF pin by the same amount as the load on the VC pin.
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LT3781
PI FU CTIO S
The error amplifier is typically configured using a feedback RC network to realize an integrator circuit. This circuit creates the dominant pole for the converter regulation feedback loop. Integrator characteristics are dominated by the value of the capacitor connected from the VC pin to the VFB pin and the feedback resistor connected to the VFB pin. Specific integrator characteristics can be configured to optimize transient response. The error amplifier can also be configured as a transimpedance amplifier for use in secondary-side controller applications. (See the Applications Information section for configuration and compensation details) SENSE (Pin 11): Current Sense Amplifier (CSA) Noninverting Input. Current is monitored via a ground referenced current sense resistor, typically in series with the source of the bottom side switch FET. Internal current limit circuitry provides for a maximum peak value of 150mV across the sense resistor during normal operation. SG (Pin 12): Synchronous Switch Output Driver. This pin can be connected directly to gate of synchronous switch if small FETs are used (CGATE < 5000pF), however, the use of a gate drive buffer is recommended for peak efficiencies. The SG pin output is synchronized and out-of-phase with the BG output. The control timing of the SG output cause it to "lead" the primary switch path during turn-on by 150nS. VCC (Pin 13): IC Local Power Supply Input. Bypass with at a capacitor at least 10 times greater than C5VREF. LT3781 incorporates undervoltage lockout that disables switching functions if VCC is below 8.4V. The LT3781 supports operational VCC power supply voltages from 9V to 18V (20V absolute maximum). An 18V clamp on the VCC pin is enabled during shutdown mode, preventing a trickle start circuit from pulling that pin above maximum operational levels during IC shutdown. PWRGND (Pin 14): Output Driver Ground Reference. Connect through low impedance trace to VIN decoupling capacitor. BG (Pin 15): Bottom Side Primary Switch/Forward Switch Output Driver. This pin can be connected directly to gate(s) of primary bottom side and forward switches if small FETs are used (CGATE total < 5000pF), however, the use of a gate drive buffer is recommended for peak efficiencies. The BG output is enabled at the start of each oscillator cycle in phase with the TG pin but is timed to "lag" the TG output during turn-on and "lead" the TG output during turn-off. These delays force the concentration of transitional losses onto the bottom side primary switch. An adaptive blanking circuit disables the current sense function (via the SENSE pin) while the BG pin is below 5V. BSTREF (Pin 18): VBST Supply Reference. Typically connects to source of topside external power FET switch. TG (Pin 19): Topside (Boosted) Primary Output Driver. This pin can be connected directly to gate of primary topside switch if small FETs are used (CGATE < 5000pF), however, the use of a gate drive buffer is recommended for peak efficiencies. VBST (Pin 20): Topside Primary Driver Bootstrapped Supply. This "boosted" supply rail is referenced to the BSTREF pin. Supply voltage is maintained by a bootstrap capacitor tied from the VBST pin to the boosted supply reference (BSTREF) pin. The charge on the capacitor is refreshed each switch cycle through a Schottky diode connected from the VCC supply (cathode) to the VBST pin (anode). The bootstrap capacitor (CBOOST) must be at least 100 times greater than the total load capacitance on the TG pin. A capacitor in the range of 0.1F to 1.0F is generally adequate for most applications. The bootstrap diode must have a reverse breakdown voltage greater than the converter VIN. The LT3781 supports operational VBST supply voltages up to 90V (absolute maximum) referenced to ground. Undervoltage Lockout disables the topside switch until VBST - BSTREF > 7.0V for start-up protection of the topside switch.
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20 VBST 19 TG 18 BSTREF NOL LOGIC
FSET 6 f = x2 T Q S R Q
PHASE DETECT S
12 SG
VC 10
SENSE 11 5VREF BLANKING
VFB 9 ERROR AMP
VCC 13 1.25V
18V
SHDN 1
+
UVLO (<8V)
-
x4 ILIM 10A
1.25V
REFERENCE GENERATOR 1.25V
THERM 3
5VREF 5
1.25V
+ - +
225mV
1681 BD
OVLO 2
SGND 4
-
+
-
+
x12
+ - -
14 PWRGND
S Q R
8 SS
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LT3781
BLOCK DIAGRA
SYNC 7
15 BG
- +
9
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LT3781
APPLICATIO S I FOR ATIO
Overview
The LT3781 is a high voltage, high current synchronous regulator controller, optimized for use with dual transistor forward topologies. The IC uses a constant frequency, current mode architecture, with internal logic that prevents operation over 50% duty cycle. A unique synchronization scheme allows the system clock to be synchronized up to an operational frequency of 350kHz, along with phase control for easy integration of multicontroller systems. A local precision 5V supply rail is available for external support circuitry and can be loaded up to 20mA. Internal fault detection circuitry disables switching when a variety of system faults are detected such as: input supply overvoltage or undervoltage faults, excessive system temperature, and local supply overcurrent conditions. The LT3781 has a current-limit soft-start feature, which gradually increases the current drive capability of a converter system to yield a smooth start-up with minimal overshoot. The soft-start circuitry is also used for smooth recoveries from system fault conditions. External FET switches are employed for the switch elements, and hearty switch drivers allow implementation of high current designs. An adaptive blanking scheme built into the LT3781 allows for correct current-sense blanking regardless of switch size. The LT3781 employs a voltage output error amplifier, providing superior integrator linearity and allowing easy high bandwidth integration of optocoupler feedback for fully isolated solutions. Theory of Operation (See Block Diagram) The LT3781 senses the output voltage of its associated converter via the VFB pin. The difference between the voltage on this pin and an internal 1.25V reference is amplified to generate an error voltage on the VC pin, which is used as a threshold for the current sense comparator. The current sense comparator gets its information from the SENSE pin, which monitors the voltage drop across an external current sense resistor. When the detected switch current increases to the level corresponding to the error voltage on the VC pin, the switches are disabled until the next switch cycle.
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During normal operation, the LT3781 internal oscillator runs at twice the switching frequency. The oscillator output toggles a T flip-flop, generating a 50% duty cycle pulse that is used internally as the system clock for the IC. When the output of this flip-flop transitions high, the primary switches are enabled. The primary side switches stay enabled until the transformer primary current, sensed via the SENSE pin connected to a ground-referenced resistor in series with the bottom side switch FET, is sufficient to trip the current sense comparator and, in turn, reset the RS latch. When the RS latch resets, the primary switches are disabled and the synchronous switch is enabled. The adaptive blanking circuit senses the bottom side gate voltage and prevents current sensing until the FET is fully enabled, preventing false triggering due to a turn-on transition glitch. If the current comparator threshold is not obtained when the flip-flop output transitions low, the RS latch is bypassed and the primary switches are disabled until the next flip-flop output transition, forcing a maximum switch duty cycle less than 50%. System Fault Detection-The General Fault Condition (GFC) The LT3781 contains circuitry for detecting internal and system faults. Detection of a fault triggers a "general fault condition", or GFC. When a GFC is detected, the LT3781 disables switching and discharges the soft-start capacitor. When the GFC subsides, the LT3781 initiates a startup cycle via the soft-start circuitry to assure a graceful recovery. Recovery from a GFC is gated by the soft-start capacitor discharge. The capacitor must be discharged to a threshold of 225mV before the GFC can be concluded. As the zero output current threshold of the SS pin is typically a transistor VBE, or 0.7V, latching the GFC until a 225mV threshold is achieved assures a zero output current state in the event of a short-duration fault. A GFC is also triggered during system state change event, such as entering shutdown mode, to prevent any mode transition abnormalities.
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LT3781
APPLICATIO S I FOR ATIO
Events that trigger a GFC are:
a) Exceeding the current limit of the 5VREF pin b) Detecting an undervoltage condition on VCC c) Detecting an undervoltage condition on 5VREF d) Pulling the SHDN pin below the shutdown threshold e) Exceeding the 1.25V fault detector threshold on either the OVLO or THERM pins OVLO and THERM pins is used to directly trigger a GFC. If either of these pins are not used, they can be disabled by connecting the pin to ground. The intention of the OVLO pin is to allow the monitoring of the input supply to protect from an overvoltage condition though the use of a resistor divider from the input supply. Monitoring of system temperature (THERM) is possible through use of a resistor divider using a thermistor as a divider component. The 5VREF pin can provide the precision supply required for these applications. When these fault detection circuits are disabled during shutdown or VCC pin UVLO conditions, a reduction in OVLO and THERM pin input impedance to ground will occur. To prevent excessive pin input currents, low impedance pull-up devices must not be used on these pins. Undervoltage Lockout The LT3781 maintains a low current operational mode when an undervoltage condition is detected on the VCC supply pin, or when VCC is below the undervoltage lockout (UVLO) threshold. During a UVLO condition on the VCC pin, the LT3781 disables all internal functions with the exception of the shutdown and UVLO circuitry. The external 5VREF supply is also disabled during this condition. Disabling of all switching control circuity reduces the LT3781 supply current to <1mA, making for efficient integration of trickle charging in systems that employ output feedback supply generation. The function of the high side switch output (TG) is also gated by UVLO circuitry monitoring the bootstrap supply (VBST - BSTREF). Switching of the TG pin is disabled until
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LT3781
3781 F01
Figure 1. Nonisolated Error Amp Configuration
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the voltage across the bootstrap supply is greater than 7.4V. This helps prevent the possibility of forcing the high side switch into a linear operational region, potentially causing excessive power dissipation due to inadequate gate drive during start-up. Error Amplifer Configurations The converter output voltage information is fed back to the LT3781 onto the VFB pin where it is transformed into an output current control voltage by the error amplifier. The error amplifier is generally configured as an integrator and is used to create the dominant pole for the main converter feedback loop. The LT3781 error amplifier is a true high gain voltage amplifier. The amplifier noninverting input is internally referenced to 1.25V; the inverting input is the VFB pin and the output is the VC pin. Because both low frequency gain and integrator frequency characteristics can be controlled with external components, this amplifier allows far greater flexibility and precision compared with use of a transconductance error amplifier. In a nonisolated converter configuration where a resistor divider is used to program the desired output voltage, the error amplifier can be configured as a simple active integrator, forming the system dominant pole ( Figure 1). Placing a capacitor CERR from the VFB pin to the VC pin will set the single-pole crossover frequency at (2RFBCERR)-1. Additional poles and zeros can be added by increasing the complexity of the RC network.
VOUT RFB 9 CERR VFB 1.25V
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LT3781
APPLICATIO S I FOR ATIO
OSCILLATOR FREQUENCY (kHz)
Another common error amplifier configuration is for optocoupler use in fully isolated converters with secondary side control (Figure 2). In such a system, the dominant pole for the feedback loop is created at the secondary side controller, so the error amplifier needs only to translate the optocoupler information. The bandwidths of the optocoupler and amplifier should be as high as possible to simplify system compensation. This high bandwidth operation is accomplished by using the error amplifier as a transimpedance amplifier, with the optocoupler transistor emitter providing feedback information directly into the VFB pin. A resistor from VFB to ground provides the DC bias condition for the optocoupler. Connecting the optocoupler transistor collector to the local 5VREF supply reduces Miller capacitance effects and maximizes the bandwidth of the optocoupler. Also, higher optocoupler current means higher bandwidth, and the 5VREF supply can provide collector currents up to 10mA.
VOUT SENSE 5 5VREF 5V 9 VFB
10
VC
1.25V LT3781
3781 F02
Figure 2. Optocoupler High-BW Configuration
Oscillator Frequency Programming and Synchronization The LT3781 internal oscillator runs at twice the system switching frequency. The oscillator output toggles a T flip-flop, generating a 50% duty cycle pulse that is used
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internally as the system clock for the IC. Free-run frequency for the internal oscillator is programmed via an RC timing network connected to the FSET pin. A pull-up resistor RFSET, connected from the 5VREF pin to FSET, provides current to charge a timing capacitor CFSET connected from the FSETpin to ground. The oscillator operates by allowing RFSET to charge CFSET up to 2.5V at which point RFSET is pulled back toward ground by a 2.5K resistor internal to the LT3781. When the voltage across CFSET is pulled down to 1.5V, the FSET pin becomes high impedance, once again allowing RFSET to charge CFSET. Figure 3 is a plot of oscillator frequency vs CFSET and RFSET is shown below. Typical values for 300kHz operation (150kHz system frequency) are CFSET = 150pF and RFSET = 51k.
600 550 500 450 400 350 300 250 200 150 100 20 30 40 50 60 70 80 TIMING RESISTOR (k) 90 100 330pF 200pF 150pF 100pF
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Figure 3. Oscillator Frequency vs. Timing Components
Due the relatively fast fall time of the oscillator waveform, the FSET pin is held at its 1.5V threshold by an internal low impedance clamp to reduce undershoot error. As a result, if this pin is externally forced low for any reason, external current limiting is required to prevent damage to the LT3781. Continuous source current from the FSET pin should not exceed 1mA. Putting a 2k resistor in series with any low impedance pull-down device will assure proper function and protect the IC from damage.
3781f
LT3781
APPLICATIO S I FOR ATIO
Oscillator Synchronization
Synchronization of the LT3781 system clock is accomplished by driving a TTL level logic pulse train at the desired system switching frequency into the SYNC pin. In order to assure proper synchronization, each phase of the synchronization signal must be less than an oscillator free-run cycle. The SYNC input pulse controls the phasing as well as the frequency of controller switching. The SYNC circuit functions by forcing the phase of the oscillator output flip-flop to match the phase of the SYNC pulse and prematurely ending the oscillator charge cycle on each transition edge. At the SYNC logic low-to-high transition, the LT3781 starts a switch-on cycle and the minimum switch-off period is forced during the SYNC logic low period. Because the SYNC logic low period corresponds directly to the minimum off time, the converter maximum duty cycle can be forced using the SYNC input. For example, a 30% duty cycle SYNC pulse forces 30% maximum duty cycle operation for the converter. Because the logic-low pulse width exceeds the logic-high pulse width in < 50% duty cycle operation, the oscillator free-run cycle time must be programmed to exceed the logic-low duration.
2.5V FSET 1.5V SYNC SYSTEM CLOCK (INTERNAL)
3781 F04
Figure 4. Oscillator/SYNC Waveforms
It is also possible to run the LT3781 in a SYNC-only mode by disabling the oscillator completely. Connecting a resistor divider from the 5VREF pin to the FSET pin forcing a voltage within the charge range of 1.5V-2.5V will allow the oscillator to follow the SYNC input exclusively with no provision for free-run. Setting values to force a voltage as close to 2V as possible is recommended.
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5 5VREF 75k LT3781 6 FSET 51k 100pF
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Figure 5. Oscillator Connection for SYNC-Only Mode Operation
Bootstrap Start It is inefficient as well as impractical to power a controller IC from a high-voltage input supply. Using a linear preregulation scheme to provide the required VCC voltage for the LT3781 would waste significant power, reducing converter efficiencies and creating additional thermal concerns. Self-biased power schemes take advantage of inherent converter efficiencies to significantly reduce losses associated with powering the controller. Bootstrapped power can be derived using auxiliary windings on the power transformer or inductor, rectified taps on switching nodes, or the converter output directly. Start-up circuitry built into the LT3781 allows VCC to increase from 0V to 14.5V before the converter is enabled. During this time, start-up current is less than 1mA. The trickle current required for charging the VCC supply is typically generated with a resistor from the converter high voltage input. When combined with the VCC bypass capacitor, the current through the start-up resistor creates a voltage ramp on VCC whose slope governs the turn-on time of the converter. The low quiescent current of the LT3781 allows the input voltage to be trickled up with minimal power dissipation in the start-up resistor. At VCC = 14.5V, the LT3781 internal circuitry is enabled and switching begins. If enough bootstrap power is fed back into VCC to keep that supply voltage above 8.4V, then switching continues and a bootstrap start is accomplished. If the input voltage drops below 8.4V, the LT3781 is disabled and the switching regulator returns to the start-up low current state.
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LT3781
APPLICATIO S I FOR ATIO
Shutdown
The LT3781 SHDN pin will support TTL and CMOS logic signals and also analog inputs. The SHDN pin turn-on (rising) threshold is 1.25V with 150mV of hysteresis. A common use of the SHDN pin is for under voltage detection on the input supply. Driving the SHDN pin with a resistor-divider connected from the input supply to ground will prevent switching until the desired input supply voltage is achieved. An 18V clamp on the VCC pin is enabled during shutdown mode, preventing a trickle start circuit from pulling that pin above maximum operational levels. The LT3781 enters an ultralow current shutdown mode when the SHDN pin is below 350mV. During this mode, total supply current drops to a typical value of 16A. When SHDN rises above 350mV, the IC will draw increasing amounts of supply current until just before the 1.25V turn-on threshold is achieved, when the supply current reaches 75A. The shutdown function can be disabled by connecting the SHDN pin to VCC. This pin is internally clamped to 2.5V through a 20k series input resistance and can therefore draw almost 1mA when tied directly to the VCC supply. This additional current can be minimized by making the connection through an external series resistor (100k is typically used). Soft-Start The LT3781 current control pin (VC) limits sensed current to zero at voltage less than 1.4V through full current limit at VC = 3.2V, yielding 1.8V over the full regulation range. The voltage on the VC pin is internally forced to be less than or equal to SS + 0.7V. As such, the SS pin has a "dead zone" between 0V and 0.7V, where a zero sensed current condition is maintained. At SS voltages above 0.7V, the sensed current limit threshold on the VC pin may rise as needed up to the SS maintained current limit value. Once the SS pin rises to the VC pin maximum value less 0.7V, or 2.5V, the SS circuit has no effect.
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The SS pin sources a typical current of 10A. Placing a capacitor (CSS) from the SS pin to ground will cause the voltage on the SS pin to ramp up at a controlled rate, allowing a graceful increase of maximum converter output current during a start-up condition. The start-up delay time to full available current limit is: tSS = 2.5 * 105 * CSS (sec) The LT3781 internally pulls the SS pin below the zero current threshold during any fault condition to assure graceful recovery. The SS circuit also acts as a fault control latch to assure a full-range recovery from a short duration fault. Once a fault condition is detected, the LT3781 will suspend switching until the SS pin has discharged to approximately 225mV. Layout Considerations-Grounding The LT3781 is typically used in high current converter designs that involve substantial switching transients. The switch drivers on the IC are designed to drive large capacitances and, as such, generate significant transient currents. Careful consideration must be made regarding input and local power supply bypassing to avoid corrupting the ground references used by the error amplifier and current sense circuitry. Effective grounding of the two-transistor synchronous forward topology where the LT3781 is used is inherently difficult. The situation is complicated further by the number of bypass elements that must be considered. Typically, high current paths and transients from the input supply and any local drive supplies must be kept isolated from SGND, to which sensitive circuits such as the error amp reference and the current sense circuits, as well as the local 5VREF supply, are referred. By virtue of the topologies used in LT3781 applications, the large currents from the primary switches, as well as the switch drive transients, pass through the sense resistor to ground. This defines the ground connection of the sense resistor as the reference point for both SGND and PGND. In nonisolated applications where SGND is the output reference, we now have a condition where every bypass capacitor in the converter is referenced to the same point.
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LT3781
APPLICATIO S I FOR ATIO
Effective grounding can be achieved by considering the return current paths from the sense resistor to each respective bypass capacitor. Don't be tempted to run small traces to separate the grounds. A power ground plane is important as always in high power converters, but bypass elements must be oriented such that transient
LT3781
5VREF
SGND
Figure 6. High-Current Transient Return Paths
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currents in the return paths of VIN and VCC do not mix. Care must be taken to keep these transients away from the SGND reference. An effective approach is to use a 2-layer ground plane, reserving an entire layer for SGND. The 5VREF and nonisolated converter output bypasses can then be directly connected to the SGND plane.
VBST VIN VBST BSTREF VCC VCC PGND
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L1 4.7H L2 4.8H 10 MMBT3906LT1 3 T1 Q1 VOUT+ C4 1.5F 100V
LT3781
*
C3 1.5F 100V 4.7 MURS120T3 MURS120T3 6 4 10 Q3 MMBT3906LT1 0.030 1/2W 2 Q5, Q6 FDS6680A x2 2.2nF 250V VOUT- S MBR0530 5 NC Q14, Q15 FDS6680A x2
*
*
*
TYPICAL APPLICATIO S
1
VIN-
ZVN3310F BAT54 FZT690B 4.7F 10k
100 0.25W
2k 0.22F MMBZ5240BLT1 10V
S 330pF
C1: MURATA ERIE GHM3045X7R222K-GC C2, C3, C4: VITRAMON VJ1825Y155MXB C5 TO C8: 330F 10V KEMET T510X337K010AS OR 330F 6.3V KEMET T520D337M006AS ISO1: FAIRCHILD MOC207 L1: COILCRAFT DO1608C-472 L2: PANASONIC ETQPAF4R8HFA L3: COILCRAFT DO1608C-105 Q1, Q3: SILICONIX Si4486EY Q5, Q6, Q14,Q15: FAIRCHILD FDS6680A T1: MIDCOM 31267R OR COILTRONICS CTX02-14675 (FUNCTIONAL INSULATION) OR MIDCOM 31322R (BASIC INSULATION) T2: MIDCOM 31264R (FUNCTIONAL INSULATION) OR MIDCOM 31323R (BASIC INSULATION) BAT54 1000pF L3 1mH 0.1F BAS21 T2 1* 3.3 0.1F 3 4 1k 4700pF 14 52.3k 1F 82pF 4700pF 3300pF 10 5 8 1k 2 S 0.1F 19 TG BSTREF BG SENSE LT3781 FSET 6 3 7 4 8 10 3k THERM SYNC SGND SS VC VFB 9 PGND 12 SG 18 15 11 14 20 BAT54 S BAS21 0.022F 3.3k 1 220pF 10k 15 5 12 11 16 2 6 VDD ISNS ISNSGND FG CG VCOMP 8 SYNC VFB OPTODRV LTC1698 OVPIN MARGIN VAUX PGND GND PWRGD ICOMP 3 4 10 9 7 13
73.2k 1%
267k 0.25W
20k
BAS21
*6
13
4.22k 1% 3.01k
VCC VBST
2
OVLO
1 5
SHDN 5VREF
976 0.1F 1k
10k
5VREF
ISO1 5VREF MOC207 431 7 6
1nF
0.1F
+
1.24k 1%
3781 F07
68F 20V
1.24k 1%
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Figure 7. 36V to 72V DC in to 5V/10A Isolated Synchronous Forward Converter
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16
12 11 10 9 8 7 1nF 100V 1000pF 100V 10 0.25W 10 0.25W
VIN+
C2 1.5F 100V
+
C5 TO C8 330F 10V x4
L1 3.3H VSEC 10 MMBT3906LT1 1 T1 Q1 VOUT+ C4 1.5F 100V L2 2.35H
VIN+
*
C2 1.5F 100V 7 10 0.25W 4.7 1000pF 100V 5 2 10 Q3 4 MMBT3906LT1 0.025 1/2W 3 1000pF 100V 10 0.25W Q6, Q15, Q17 FDS6680A x3 MURS120T3 MURS120T3
C3 1.5F 100V
*
+
C5 TO C8 330F 10V x4
*
TYPICAL APPLICATIO S
VIN- S MBR0530 Q12 ZVN3310F BAT54 100 4.7F 16V Q13 FZT690B 2k 0.25W
VOUT-
0.22F 50V MMBZ5240BLT1 10V
10k 330pF
S
C1: MURATA ERIE GHM3045X7R222K-GC C2, C3, C4: VITRAMON VJ1825Y155MXB C5 TO C8: 330F 10V KEMET T510X337K010AS OR 330F 6.3V KEMET T520D337M006AS C26: AVX TPSE686M020R0150 ISO1: FAIRCHILD MOC207 L1: COILCRAFT DO1608C-332 L2: PULSE P1977 PLANAR INDUCTOR L3: COILCRAFT DO1608C-105 Q1, Q3: SILICONIX Si4486EY Q5, Q6, Q14,Q15,Q17: FAIRCHILD FDS6680A Q7: FAIRCHILD NDT410EL Q12: ZETEX ZVN3310F Q13: ZETEX FZT690 T1: PULSE P1976 PLANAR TRANSFORMER (FUNCTIONAL INSULATION) OR PULSE PA-0191 (BASIC INSULATION) T2: MIDCOM 31264R (FUNCTIONAL INSULATION) OR MIDCOM 31323R (BASIC INSULATION) BAT54 1000pF L3 1mH 0.1F 100V BAT54 BAS21 T2 1* 3.3 0.1F 3 4 1k 4700pF 14 3300pF 10 82pF 4700pF 5 8 1k 2 S 0.1F 20 TG BSTREF BG SENSE LT3781 FSET 6 3 7 4 8 10 3k THERM SYNC SGND SS VC VFB 9 PGND 12 SG 19 18 15 11 14 S BAS21 0.022F
73.2k 1%
1k 1 220pF 10k 15 5 SYNC OPTODRV LTC1698 12 11 16 2 6 VDD ISNS ISNSGND FG CG VCOMP VFB OVPIN MARGIN VAUX PGND GND PWRGD ICOMP 3 4 10 8 9 7 13 1k 2.43k 1% 3.01k
267k 0.25W
20k
BAS21
*6
13
VCC VBST
2
OVLO
1 5 52.3k 1%
SHDN 5VREF
1.78k 1% TRIM 0.33F
10k
5VREF
ISO1 5VREF MOC207 431 7 6
1nF
0.1F 1F
+
1.24k 1%
1698 F11
C26 68F 20V
1.24k 1%
LT3781
17
Figure 8. 36V to 72V DC in to 3.3V/20A Isolated Synchronous Forward Converter
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Q5, Q14 FDS6680A x2 C1 2200pF 250V
3781f
L1 3.3H VSEC 10 MMBT3906LT1 1 T1 Q1 VOUT+ C4 1.5F 100V L2 2.35H
LT3781
*
C3 1.5F 100V 4.7 1000pF 100V 5 2 10 Q3 4 MMBT3906LT1 0.025 1/2W 3 1000pF 100V 10 0.25W Q6, Q15, Q17 FDS6680A x3 7 MURS120T3 MURS120T3
*
*
TYPICAL APPLICATIO S
S
MBR0530 2k 0.25W 100
5VREF 9V BAT54 62k 0.25W 10k MMBZ5248LT1 18V 330pF 4.7F 16V Q13 FZT690B
1.5k 0.25W Q12 ZVN3310F
1.5k 0.25W
0.22F 50V MMBZ5240BLT1 10V
Q7 NDT410EL
47k
MMBT3904LT1
S
MMBD914LT1
C1: MURATA ERIE GHM3045X7R222K-GC C2, C3, C4: VITRAMON VJ1825Y155MXB C5 TO C8: 330F 10V KEMET T510X337K010AS OR 330F 6.3V KEMET T520D337M006AS C26: AVX TPSE686M020R0150 ISO1: FAIRCHILD MOC207 L1: COILCRAFT DO1608C-332 L2: PULSE P1977 PLANAR INDUCTOR L3: COILCRAFT DO1608C-105 Q1, Q3: SILICONIX Si4486EY Q5, Q6, Q14,Q15,Q17: FAIRCHILD FDS6680A Q7: FAIRCHILD NDT410EL Q12: ZETEX ZVN3310F Q13: ZETEX FZT690 T1: PULSE P1976 PLANAR TRANSFORMER (FUNCTIONAL INSULATION) OR PULSE PA-0191 (BASIC INSULATION) T2: MIDCOM 31264R (FUNCTIONAL INSULATION) OR MIDCOM 31323R (BASIC INSULATION) VOUT+ 1000pF
4.7F BAT54 L3 1mH 0.1F 100V BAS21 BAS21 20 14 3.3 3 0.1F 4 1k 4700pF 14 3300pF 10 82pF 4700pF 5 1k 8 2 S 0.1F PGND 12 SG 9 3k VCC VBST BLKSENS TG BSTREF BG SENSE OVLO SHDN 5VREF FSET 6 8 10 3 7 4 5 5VREF 52.3k 1% THERM SYNC SGND SS VC VFB LT3781 19 18 15 11 1* T2 S BAT54 BAS21
100 0.25W 9V 0.022F 1k 1 12 11 16 2 6 2.43k 1% 1 6 7 3.01k 1% 3 SENSE+
73.2k 1%
+
LT1006S8 10k 15 5 VDD ISNS ISNSGND FG CG VCOMP SYNC OPTODRV LTC1698 VFB OVPIN MARGIN VAUX PGND GND PWRGD ICOMP 3 4 10 8 9 7 13 1k 3.01k 1%
267k 0.25W
20k 2 1
*6
220pF
13
1.78k 1%
3.01k 1%
5 4
-
2 3.01k 1%
SENSE- TRIM 0.33F
10k
ISO1 5VREF MOC207 431 7 6
0.1F 1F
1.24k 1%
+
1nF
1.24k 1%
3.01k 1%
1698 F12
C26 68F 20V
100 0.25W
Figure 9. 36V to 72V DC in to 3.3V/20A Isolated Synchronous Forward Converter with Fast Start and Differential Sense
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10 0.25W
VIN+
C2 1.5F 100V
+
Q5, Q14 FDS6680A x2 C1 2200pF 250V VOUT-
C5 TO C8 330F 10V x4
VIN-
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LT3781
PACKAGE DESCRIPTION
G Package 20-Lead Plastic SSOP (5.3mm)
(Reference LTC DWG # 05-08-1640)
7.8 - 8.2
0.42 0.03 RECOMMENDED SOLDER PAD LAYOUT 5.00 - 5.60** (.197 - .221)
0.09 - 0.25 (.0035 - .010)
0.55 - 0.95 (.022 - .037)
NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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1.25 0.12
6.90 - 7.50* (.272 - .295 ) 20 19 18 17 16 15 14 13 12 11
5.3 - 5.7 7.40 - 8.20 (.291 - .323)
0.65 BSC 1 2 3 4 5 6 7 8 9 10 2.0 (.079)
0 - 8
0.65 (.0256) BSC
0.22 - 0.38 (.009 - .015)
0.05 (.002)
G20 SSOP 0802
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LT3781 RELATED PARTS
PART NUMBER LT1158 LT1160 LT1162 LT1336 LT1339 LTC 1530 LTC1625 LT1640 LT1680 LT1681 LTC1696
(R)
DESCRIPTION Half-Bridge N-Channel MOSFET Driver Half-Bridge N-Channel MOSFET Driver Dual Half-Bridge N-Channel MOSFET Driver Half-Bridge N-Channel MOSFET Driver High Power Synchronous DC/DC Controller High Power Step-Down Switching Regulator Controller No RSENSE Synchronous Controller Negative Voltage Hot SwapTM Controller High Power DC/DC Current Mode Step-Up Controller Dual Transistor Synchronous Foward Controller Overvoltage Protection Controller in ThinSOT Package
TM TM
COMMENTS Current Limit Protection, 100% of Duty Cycle Up to 60V Input Supply, No Shoot-Through VIN to 60V, Good for Full-Bridge Applications Smooth Operation at High Duty Cycle (95% to 100%) 60V Dual N-Channel MOSFET Controller Excellent for 5V to 3.x Up to 50A 97% Efficient, 1.19V VIN 36V, 1.19V VOUT VIN Allows Safe Board Insertion and Removal from a Live -48V Backplane, Operates from -10V to -80V High Side Current Sense, Up to 60V Input Operation up to 72V Maximum 2% Overvoltage Threshold Protection Accuracy, Gate Drive for SCR Crowbar or External N-Channel MOSFET Disconnect, Monitors Two Output Voltages Use with the LT1681, Isolated Power Supplies, Contains Voltage Merging, Optocoupler Driver, Synchronization Circuit with the Primary Side Current Mode, 3.5V VIN 36V, 0.5V VOUT 5V 50W to 2kW Power Supply Design, Adaptive Direct Sense ZVS Minimizes CIN and COUT, 4V VIN 36V, 300kHz Generates Auxiliary Output in Isolated DC/DC Converters, Programmable Current Limit Protection, 0.8V 1.5% Reference High Frequency Reduces Size of Inductors, Minimum CIN, 4V VIN 36V, IOUT1, 2 up to 20A
LTC1698 LTC1735 LTC1922-1 LTC1929 LT3710 LTC3728
Secondary Synchronous Rectifier Controller Synchronous Step-Down Controller Synchronous Phase Modulated Full-Bridge Controller 2-Phase 42A Synchronous Controller Secondary Side Synchronous Post Regulator 550kHz, Dual 2-Phase Synchronous Controller
No RSENSE, ThinSOT and Hot Swap are trademarks of Linear Technology Corporation.
3781f
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
q
LT/TP 0303 2K * PRINTED IN USA
FAX: (408) 434-0507 q www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001

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